As semiconductor devices become more highly integrated, the size of a contact hole that connects one element to another element or one layer to another layer may decrease and the thickness of an interlayer insulating layer may increase. Thus, the aspect ratio of the contact hole, i.e., the ratio between the height of the contact hole and the diameter of the contact hole, increases and an alignment margin of the contact hole decreases in a photolithography process. Accordingly, the formation of small contact holes by conventional methods may be difficult.
For this reason, the size of a buried contact (BC) serving as a storage node contact is also decreased, thereby the depth thereof becomes gradually smaller from an upper part to a lower part, and the contact hole is not completely formed. Accordingly, in order to increase the size of the buried contact, the size of the contact hole may be increased by, for example, performing a wet etching process on the contact hole after formation of the contact hole.
Meanwhile, as semiconductor devices become more highly integrated, the size of a bit line may be reduced, and a margin for insulating an underlying pad may become insufficient during the wet etch process performed for the purpose of increasing the size of the buried contact, thereby partially exposing an adjacent pad. Accordingly, an etching solution may penetrate through a direct contact (DC) that electrically connects the bit line to an underlying contact pad, so that a conductive material may be etched.
Therefore, the direct contact (DC) of the underlying bit line may be partially filled with an insulating material or a conductive material of a buried contact (BC) in a subsequent process, thereby resulting in unwanted electrical contact failures.